Metallization of electrical connections has been widely used in many semiconductor applications, ranging from dual damascene to various packaging structures including C4 bumping, pillars, micro-bumps, redistribution layers (RDL), thru-silicon vias (TSV), etc. Such metallization is commonly carried out using techniques such as electro-deposition and electro-less deposition of different metals, such as copper, gold, nickel, solder, and others. As technology advances, the chip layout increasingly has features and pattern density that are difficult to plate or metallize uniformly.
Electro-deposition of advanced microelectronic device packaging often uses a mask or a photoresist layer to define the pattern of metal lines or contacts. The pattern can also be defined by non-reacting or non-conducting surfaces. As used here, the term patterned substrate means a substrate having a mask or photoresist layer or non-reacting or non-conducting regions. The pattern density may vary between sparsely patterned regions and densely patterned regions. This causes corresponding variations in local current density and ion concentration differences, which affect deposition thickness uniformity within a die (the so-called within die non-uniformity, or WID non-uniformity).
One technique for improving thickness uniformity or thickness levelling is to reduce the applied current density overall. Alternatively, a plating bath with high throwing power may be used. Throwing power can be defined as the ability of a plating bath to produce deposits of more or less uniform thickness on cathodes having macroscopic irregularities. The higher the throwing power, the more uniform the resulting deposit. In the case of a copper-acid bath, for example, a common bath formulation with high throwing power would be one with low copper concentration and high acid concentration. Another alternative to reducing current density in a high throwing power bath is to use a periodic reverse current waveform. However, improved plating techniques are needed.